1. Filed of the Invention
This invention relates a phase-locked loop, it specifically relates to phase-controlled current source of a phase-locked loop and it has characteristic of controlling output signal by phase for charging/discharging current.
2. Prior art
Phase-Locked Loop (PLL) is commonly used in current communication system or other high frequency technological field, for example: 1800 MHz in Global Standard for Mobile (GSM), 5.2 GHz for IEEE802.11A and 10 GHz for Ultra-Wideband (UWB), etc.; its major function is to modulate data, video and audio information into high frequency to facilitate subsequent signal reception and transmission.
The basic function of phase-locked loop is to synchronize a loop signal and an externally added reference signal, its basic principle is to use a Phase Frequency Detector (PFD) to provide rising and descending impulse signal to a Charge Pump (CP) so as to display whether the frequency has to be raised or lowered. Then, charge pump will provide a charging or discharging path which passes through a Loop Filter (LF) and will be sent into a voltage-controlled oscillator (VCO). The output end of the voltage-controlled oscillator is connected to phase frequency detector in order to generate a feedback loop so as to ensure the locking between output frequency and input reference frequency. Among them, loop signal and reference signal can be sine wave or square wave signal; however, the rising and descending signals provided by phase frequency detector are impulse signals. In the prior art phase-locked loop, after loop signal and reference signals are connected to phase frequency detector, feedback path method is used to let phase frequency detector provide impulse signal in order to control the charging or discharging of charge pump, however, since the conventional feedback path method has longer signal feedback delay time, detection dead zone issue thus could be easily generated, meanwhile, it is not suitable to be applied in the high operation frequency field. When detection dead zone occurs, phase frequency detector can not distinguish frequency or phase difference, therefore, it can not drive charge pump.
In order to prevent the happening of detection dead zone, delay component is used in the feed back path of phase frequency detector in the prior art so as to provide the minimum rising/descending impulse width needed by the charge pump so that there will be no difficulty for the output of charging and discharging current in the charge pump due to small impulse width. However, process can not predict precisely the delay time, charging and discharging will thus occur in the same time in the charge pump and too much surges will also occur in the same time. Additionally, the delay component will also limit the frequency comparison range of phase frequency detector.